Electron counter circuits



April 84, 1952 l. E. GRosDoFF ELECTRON COUNTER CIRCUITS Filed May 51, 1950 INVENTOR IEUR E. Eausn FF ATToNEY Patented Apr. 8, 1952 UNITED STATES ATENT OFFICE ELECTRON COUNTER CIRCUITS Igor E. Grosdo', Princeton, N. J., assignor to Radio Corporation of America, a corporation of Delaware 9 Claims.

This invention relates generally to electronic computers, and particularly to a system for transferring a count entered into one counter chain to another counter chain.

A system presently employed in computers for counting electrical pulses is a chain of trigger circuit units of the' Eccles Jordan type. Pulses to be counted are applied to the first of the chain of trigger circuit units. Connections between units in the chain are such that each unit applies a pulse to drive the next unit in the sequence when the driving unit has received two pulses and is returning to its starting condition of stability. The trigger circuit units used may be of `llory et al., No. 2,442,403, for Electronic Switching and Computing Devices.

In many applications of such counters it is `desirable to transfer a count which has been entered from the counter to a register so that the counter may be free to make new counts. It is also desirable to transfer a count from the counter to a register or totalizer so that further counts may be added to or subtracted from the number in the totalizer. The totalizer may be another counting chain into which the count may be entered from one end by duplicating the number ofpulses that were applied to the counting chain. This number is indicated by suitable indicators coupled to the counting chain. Another count transferring system is to condition auxiliary equipment in accordance with the count and then to condition the totalizer according to the condition of the auxiliary equipment.

`In the systems presently in use, the transfer of theA count is made indirectly and in a series fashion; that is, substantially the number of pulses in the original count are run through and applied to one end of a register. A parallel transfer of a count from a counter to a register is `more desirable since, in that event, the entire vcount is not run through and the transfer operation may be accomplished more quickly.

It is an object of the present invention to provide an improved count transfer system wherein a parallel transfer of a count from a counter to a register is made.

vIt is a further object of the present invention to provide an improved count transfer system wherein a transfer of a count from a counter to la'register is made directly.

- units.

It is still a further object of the present invention to provide an improved count transfer system which operates more rapidly than those known heretofore.

These and further objects of the present invention are achieved by providing a plurality of concatenated flip-flop units each having a stable and an' unstable condition. The nip-flop circuits are of the general type described on pages 50-53 of the book Time Bases by O. S. Puclrle, and published by John Wiley and Sons, Inc. A flipflop circuit unit is provided for each trigger circuit unit in the counting chain. A totalizing unit chain, also consisting of a chain of trigger circuit units, has each one of its units associated with a counting chain unit. After a count has been entered into the counting chain a pulse is applied to the rst of the concatenated flip-flop This unit is coupled to the last of the counting chain units. It generates a pulse, in passing to its unstable state, which pulse is applied to the last counting chain unit as a reset pulse. If this counting chain unit is in a condition to be reset, as a result of this pulse being applied, the pulse generated thereby is combined with the remaining portion of the reset pulse. This combined pulse is then applied to the associated tctalizing unit through a pair of diodes which are biased to prevent passage of pulses having an amplitude which is less. than that ofthe combined pulse.

The first flip-flop unit then passes from its unstable to its stable state. It thereby generates a pulse which is applied to the next flip-flop unit in the sequence. This unit is connected to the next to the last counting chain unit. The concatenated flip-nop units are connected to the counting chain in reverse sequence. By virtue of the biased diodes, a pulse is applied to a unit in the totalizer chain only when a counting chain unit is in a given one of its two conditions of stability.

The novel features of the invention as well as the invention itself, both as ,to its organization and method of operation will best be understood from the following description, when read in connection with the accompanying drawings, in which Figure 1 is a partial schematic and partial circuit diagram of an embodiment of my invention, and

Figure 2 is a schematic diagram of an additional feature which may be connected to the embodiment of my invention shown in Figure 1 for providing for reset of the counting chain.

After pulses, which are counted. have been applied to a counter chain of trigger circuit units, each trigger unit in the chain is in one or the other of its tWo conditions of stability in accordance with the number of pulses which have been applied to the chain. The condition of stability of a trigger circuit unit is evidenced by conduction being in one or the other of the two electron discharge tubes in the trigger circuit. This pattern of tube conduction of each of the units of a counting chain may be readily interpreted as a number by those well versed in the art. It is this pattern of tube conduction that must be transferred to a totalizing chain.

Referring now to Figure l, there are represented schematically three rows of interconnected circuits. The top row is representative of a iplop chain, the middle row is a counter chain and the bottom row is a totalizer chain. For the purpose of clarity, the circuits of only two stages in each chain are shown. The remaining stages, which are represented by rectangles, are identical. Although only four stages in each chain are represented, as many stages as are required may be added to the end of each chain. Each flip-flop unit has an associated counter chain unit. Each counter chain unit has an associated totalizer chain unit. However, the sequence of flip-nop chain units is in reverse to that of the counter and totalizer chains for reasons which are made clear later herein. In other words, the first unit I2 of the ip-iop' chain is connected to and associated with the last unit 28 of the counter chain. Ihe second flip-flop chain I4 is connected to and associated with the next to the last unit of the counter chain 26. The connections and associationscontinue in this sequence until the last unit IB of the flip-flop chain is connected to and associated with the first unit 22 of the counter chain.

A counting pulse source serves to apply pulses to be counted to a rst trigger circuit unit 22 in the counter chain, which unit is represented by a rectangle. The second trigger circuit unit 24 is typical of all the units in the chain and consists of a first electron discharge tube 30, and a second electron discharge tube 40. The grid 34 of the rst tube is connected to the anode 42 of the second tube through a parallel resistor 3| and condenser 33. The grid 44 of the second tube 40 is likewise connected to the anode 32 of the rst tube 30 through a parallel resistor 4| and condenser 43. Each vof the grids of the tubes has a grid leak resistor 35, 45. Each of the tubes has a separate anode load resistor 38, 48. These are then joined and connected to a common anode load resistor 39. Their junction serves as an input for application of a pulse from the preceding trigger circuit unit stage 22. An output pulse, which is applied to the input 50 of the succeeding stage, is derived from the anode 42 of the second tube and applied through a condenser 52 to the succeeding stage input 50. Bias is applied to the trigger circuit through the grid leak resistors 35, 45. A glow discharge tube 54 is in series with a current limiting resistor 56 and is connected across the separate anode load resistor 38 of the first electron discharge tube 30 and serves to indicate the condition of the unit as well as the count made. When the rst tube 30 is conducting the glow discharge tube is illuminated and when the second tube 40 is conducting the glow discharge tube 54 is extinguished. An arrow adjacent an anode load resistor indicates which of the tubes is conducting.

lThe starting or zero condition of each trigger circuit unit is with conduction in the right hand or second tubes. The counter chain may be reset to this condition by operating the push button 58 connected in the bias lead. This opens the grids of the second tubes and applies a negative bias only to the grids of all the rst tubes, thus rendering them non-conductive and the second tubes conductive.

The trigger circuit units in the totalizer chain are the same as those in the counter chain and need not be redescribed.

After a count has been entered into the counting chain a pulse is applied from the transfer pulse source I0, represented by a rectangle, to the first unit I2 of the concatenated flip-flop circuit units. 'Ihe flip-op units are connected to drive each other.

Each ip-fiop unit consists of a rst B0 and a second 'I0 electron discharge tube. These may be in the same envelope as shown. The anode 62 of the first tube 60 is connected to the grid 14 of the second tube 10 through a condenser 6I. The anode 12 of the second tube 'I0 is connected to the grid 64 of the rst tube 60 through a parallel resistor "II and condenser 13. Each tube has its own anode load resistor 68, 18. The cathodes 56, I6 of both tubes are connected to a common cathode bias resistor 70. The second tube grid 'I4 is connected to the common cathode bias resistor 'I9 by means of a resistor 69. A grid leak resistor connects the rst tube grid I4 to ground.

Each flip-flop unit has a stable condition and an unstable condition. The stable condition is the one with conduction in the second tube (the right triode). An arrow adjacent the anode load resistor indicates the tube which is conducting current. Positive pulses are applied through a condenser I 3 from the preceding stage I2 to the grid 64 of the first tube 60 to render the tube conductive. After a time, dependent upon the values of the resistors and condensers cross-connecting the anodes and grids of the rst and second tubes of a flip-nop unit, conduction is restored to the second tube 10. In returning, from the unstable to the stable state, the rst tube 60 generates a positive pulse at its anode 62. This is the pulse which is applied to the coupling condenser I3 to drive the succeeding flip-flop stage I6.

In going from its stable to its unstable condition, the second nip-flop unit I4 generates a negative pulse at the anode 62 of the rst tube 60. This negative pulse is applied as a reset pulse through a coupling condenser 82 to the grid 34' of the first tube 30 of the associated counter chain .unit 26. If the count, which has been entered, has left this counter chain unit with conduction in the rst tube, the reset pulse from the flip-nop unit drives the counter stage to its other stable condition with conduction in its second tube. If the counter unit has been lleft with conduction in the second tube the pulse from the nip-flop unit has no eiect.

When the counter chain unit 26 is driven by the reset pulse from the associated lip-op unit.

I4 to its reset position a negative pulse is generated at the second tube anode 42'. This pulse is applied through a condenser 84 to the cathodes 90', 92 of a pair of diodes 86, 88. Each diode anode 04', 96 is connected -to a grid |00. |02 of the respective tubes in the associated totalizer trigger circuit unit |25. Through another coupling condenser 85 the reset pulse which has been applied to the counting chain unit 26 is also applied to the cathodes of the pair of diodes. The counting chain unit 26 is reset very rapidly by the reset pulse, so rapidly in fact, that it turns over before the reset pulse can completely subside. The circuit constants selected insure this. The remainder of the pulse from the flip-flop unit and the pulse from the counting chain unit are added across a resistor 89 connected between the diodes cathodes and ground. By means of a resistor 9|' connected between the B-lsource and the diodes cathodes 90', 92 a positive bias is applied to the cathodes. The amplitude of this bias is such that only a negative pulse, which has the amplitude of the combined pulses, is transmitted through the diodes to be applied to both totalizer unit tubes grids. This serves to transfer conduction in the totalizer unit stage.

It will be appreciated that pulses within the counter chain, when it is in the process of counting, are insuiiicient to aifect the totalizer chain in view of the biased diodes. Similarly, reset pulses from the flip-nop chain are likewise insufficient, in the absence of pulses from the counter chain units being reset thereby.

If a count has already been transferred into Athe totalizer chain, the next count, which is transferred into it from the counter, is added thereto ,in binary fashion. A description of the binary system of computation may be found in Elementary Number Theory" by Uspenski and Heaslet. In the binary system all numbers are expressed as powers of two in the form of ones and zeroes. The number of places to the left of the decimal point at which a one occurs indicates the power of two. All such powers of two which are indicated by the ones in any given binary number are added to obtain the equivalentV decimal number. In adding two binaryT numbers, the sum of a zero and zero is still zero and a zero and one is one. The sum of a one and one is a ten or a one carried to the left one place. A trigger circuit is used to express a zero in the binary system by conduction being in one of its two tubes. In the present instance this is the second tube. A one may be expressed by having current conduction in the other of the two tubes, in the presentv instance the first tube. The ones and zeroes are also respectively indicated by the presence or absence of an electrical zero, and a pulse is applied to the subsequent unit in the chain to cause it to represent a one.

Referring again to Figure 1: If a unit in the counting chain is representative of a binary totalizing unit. If the counting chain unit is representative of a binary one, with conduction in the rst tube, upon transfer, a pulse is applied to both gridsof the associated totalizer chain unit., If the totalizer chain unit is representa- "tive of a binary zero the pulse will cause it to represent a binary one with conduction in the first' tube. If the totalizer chain unit represents a binary one the pulse will cause a transferk of conduction from the rst to the second tube.

A pulse is generated thereby and applied to the succeeding totalizerunit to cause it to represent a vbinary one condition, if it is in a binary zero 4zero, with conduction in the second tube, upon transfer, no pulse is applied to the associated condition. If the succeeding unit is in a binary one condition it is turned over to the binary zero condition and the carryover pulse is applied to the unit succeeding it.

The values of the components of the flip-flop chain are selected so that there is a sufcient interval between reset pulses from the flip-flop chain to permit the totalizer chain units to drive each other.

The counting chain is coupled to the flip-flop chain in inverse order because. as each of the counting chain units are reset by the pulses from the flip-flop chain they tend to drive the succeeding counting chain units or units of a higher order. Therefore,if both chains were coupled in regular sequences the count which is entered into the counter would be destroyed before it could be transferred.

Referring to Figure 2, there is shown a schematic diagram of a system for preventing a counting chain unit, which is being reset by a pulse from a, flip-flop unit, from affecting the subsequent counting chain units. Two ip-op units I2, I4, and associated counter 26, 28, and totalizer units |26, |28 are shown. The connections and interconnections of the units are identical with the ones already described with the exception of certain additional components. In this instance, the counter chain units 26, 28 are coupled by two series condensers |3|, |32 instead of the one 52 shown in Figure 1. A high value resistor |34 is connected between the junction of the two condensers and ground. A diode |36 has its cathode |38 connected to this junction point and its anode |40 connected to the output of the flip-flop unit I2 preceding the associated flip-flop unit I4. A diode load resistor |42 is connected across the diode anode |40 and ground. With these connections, any negative drive pulses from the counter unit 26 being reset are suppressed by the positive drive pulses from the flip-flop unit |2. Therefore, the flip-nop chain serves both to transfer the count and to reset the counter. Y

From the foregoing description it will be readily apparent that there has been provided an improved count transfer system which makes a direct, parallel and rapid transfer of a count from a counter to a register. Although but a single embodiment has been shown and described it should be apparent that many changes may be made in the particular embodiment herein disclosed and that many other embodiments are possible, all within the spirit and scope of the invention. It is therefore desired that the foregoing description shall be taken as illustrative and not as limiting.

' What is claimed is:

l. Apparatus for transferring a count entered into a counting chain of bistable state trigger circuit units to a totalizing chain of bistable state trigger circuit units, each of said counting chain units being associated with one of said totalizing chain units, comprising meansto apply a reset pulse to each of said counting chain units, means to combine a portion of each reset pulse with the output pulse from each counting chain unit being reset, a plurality of means each responsive only to a combined pulse to apply saidcombined pulse to an associated totalizing chain unit whereby the count in said counting chain is transferred to said totalizing chain.

2. Apparatus for transferring a count as recited in claim 1 wherein said means to apply a reset pulse to each of said counting chain units applies said reset pulses to said counting chain units in an inverse sequence.

3. Apparatus for transferring a count entered into a counting chain of bistable state trigger circuit units to a totalizing chain of bistable state trigger circuit units, each of said counting chain units being associated with one of said totalizing chain units, comprising means to apply a reset pulse to each of said counting chain units to cause each of said counting chain units being reset to generate an output pulse, means to prevent said output pulse from each counting chain unit being reset from affecting subsequent units in said counting chain, means to combine a portion of each reset pulse with said output pulse from each counting chain unit being reset, a plurality of means each responsive only to a combined pulse to apply said combined pulses to an associated totalizing chain unit whereby the count in said counting chain is transferred to said totalizing chain and said counting chain is reset.

4. Apparatus for transferring a count entered into a counting chain of bistable state trigger circuit units to a totalizing chain of bistable state trigger circuit units, each of said counting chain units being associated with one of said totalizing chain units, said apparatus comprising a plurality of unistable flip-fiop circuit units in series, each of said nip-flop units being associated with one of said counting chain units, means to apply the output of each of said flip-flop units to its associated counting chain unit as a reset pulse, means to combine the output from each of said flip-flop units with the output from its associated counting chain unit being reset, a plurality of means each responsive only to a combined output to apply said combined output to said associated totalizing chain unit whereby the count in said counting chain is transferred to said totalizing chain.

5. Apparatus for transferring a count as recited in claim 4 wherein said series of flip-flop units are coupled with respect to said counting chain units so that the sequence of reset pulse outputs from the first to the last of said series of liip-flop units is progressively applied to said counting chain from the last to the first of its units.

6. Apparatus for transferring a count entered into a counting chain of bistable state trigger circuit units to a totalizing chain of bistable state trigger circuit units, each of said counting chain units being associated with one of said totalizing chain units, said apparatus compris ing a plurality of unistable .flip-flop circuit units in series, each of said flip-fiop units being associated with one of said counting chain units, means to apply the output of each of said fliplop units to its associated counting chain unit as a reset pulse to cause each of said counting chain units being reset to generate an output pulse, a plurality of means coupled between said flip-flop chain units and said .counting chain units to prevent said output pulses from each ,l

counting chain unit being reset from affecting subsequent units of said counting chain, .means to combine the output from each of said flipflop units with the output from its associated counting chain unit being reset, and a plurality of means each responsive only to a combined output to apply said combined output to said associated totalizing chain unit whereby the count in said counting chain is transferred to said totalizing chain.

'7. Apparatus for transferring a count as recited in claim 6 wherein each of said plurality of means coupled between said flip-flop chain units and said counting chain units to prevent 'said output pulses from each counting chain unit being reset from raffecting subsequent units of said counting chain comprises diode means coupled between the output of said counting chain unit being reset and the flip-iiop unit immediately preceding the flip-flop unit with which said counting chain unit is associated to derive a pulse therefrom of a polarity opposite to the polarity of said output pulse.

8. Apparatus for transferring a count entered into a counting chain of trigger circuit units t0 a totalizing chain of trigger circuit units, each of said trigger circuit units having a first and a second condition of stability, each of said counting chain units being associated with one of said totalizing chain units, said apparatus comprising a plurality of concatenated flip-flop units, each of said flip-iiop units being associated with one of said counting chain units in inverse sequence, each of said fiip-fiop units having a stable and an unstable condition, said concatenated units being interconnected to driveieach other in passing from an unstable to a stable condition, means to apply a pulse to the first of said chain of concatenated flip-flop units to drive it from its stable to its unstable condition, means to derive an output from each of said iiip-flop units when said unit is driven to its unstable condition, means to apply said output from each of said flip-flop units to its associated counting chain unit to drive any of said counting chain units in a second condition of stability to a first condition of stability, means to combine the output of each of said counting chain units being driven to its second condition of stability with the output from said associated driving flip-flop unit, a plurality of means each responsive only to one of said combined outputs to apply each of said combined outputs to the associated totalizing chain unit whereby the count is transferred from said counting chain to said totalizing chain.

9. Apparatus for transferring a count entered into a counting chain Vof trigger circuit units to a totalizing chain of trigger circuit units, each of said counting chain units being associated with one of said totalizing chain units, each of said trigger units including a first and second electron discharge tube, each of said tubes having a cathode, an anode and a grid, said first and second tubes being interconnected and biased to be stable with current conduction in either the first or second of said electron tubes, said apparatus comprising a plurality of concatenated fiip-flop circuit units, each of said iiip-op units being associated with one of said counting chain units in inverse sequence, each of said fiip-iiop units including a first and second electron discharge tube, each of said tubes having a cathode, anode and grid, said first and second tubes being interconnected and biased to be stable with current .conduction in said second tube and to be unstable with current conduction in said first tube, said concatenated flip-flop units being interconnected to drive each other when one of said units passes vfrom an unstable to a stable condition, means to couple the anode of the first tube of each of said flip-flop units to the grid of the first tube of said respective associated counting chain units, and a plurality of means, each of .which couples the anode of the iirst tube of each of said iiip-op units and the anode of the second tube of said respective associated counting chain units to the grids of the first and second tubes of said respective associated totaiizing units, each of said last-named means including a pair of diodes having their respective anodes coupled to the respective grids of the iirst and second tubes of the totalizing unit and their cathodes connected together to form a junction. and means to apply a bias to said junction to maintain said diodes non-conducting except upon application to said junction of a combined output from the anode of the second tube of said flip-flop unit and the anode of the rst tube of said associated counting chain unit.

IGOR E. GRO-SDOFF. No references cited. 

